Texas Instruments SimpleLink CC2620 Technical Reference Manual page 106

Cortex-M3 Processor Registers
2.7.3.18 STIM17 Register (Offset = 44h) [reset = X]
STIM17 is shown in
Stimulus Port 17
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 STIM17
106
Figure 2-51 and described in
Figure 2-51. STIM17 Register
Table 2-76. STIM17 Register Field Descriptions
Type Reset
R/W X
Copyright © 2015, Texas Instruments Incorporated
Table 2-76.
STIM17
R/W-X
Description
A write to this location causes data to be written into the FIFO if
TER.STIMENA17 is set. Reading from the stimulus port returns the
FIFO status in bit [0]: 0 = full, 1 = not full. The polled FIFO interface
does not provide an atomic read-modify-write, so it's users
responsibility to ensure exclusive read-modify-write if this ITM port is
used concurrently by interrupts or other threads.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
9 8 7 6 5 4 3 2
Submit Documentation Feedback
1 0