Texas Instruments SimpleLink CC2620 Technical Reference Manual page 697

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9.1.1.7 RTC_OFFSET Register (Offset = FC0h) [reset = FFFFFFFFh]
RTC_OFFSET is shown in
Real Time Clock Offset
Enabled by MODE_CONF.RTC_COMP.
31 30 29 28
15 14 13 12
RTC_COMP_P1
R/W-FFh
Bit Field
31-16 RTC_COMP_P0
15-8 RTC_COMP_P1
7-0 RTC_COMP_P2
SWCU117C – February 2015 – Revised September 2015
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Figure 9-7 and described in
Figure 9-7. RTC_OFFSET Register
27 26 25 24
RTC_COMP_P0
R/W-FFFFh
11 10 9 8
Table 9-8. RTC_OFFSET Register Field Descriptions
Type Reset
R/W FFFFh
R/W FFh
R/W FFh
Copyright © 2015, Texas Instruments Incorporated
Table 9-8.
23 22 21 20
7 6 5 4
RTC_COMP_P2
R/W-FFh
Description
Reserved for future use. Software must not rely on the value of a
reserved. Writing any other value than the reset/default value may
result in undefined behavior.
Reserved for future use. Software must not rely on the value of a
reserved. Writing any other value than the reset/default value may
result in undefined behavior.
Reserved for future use. Software must not rely on the value of a
reserved. Writing any other value than the reset/default value may
result in undefined behavior.
Customer Configuration (CCFG)
19 18 17 16
3 2 1
Device Configuration
0
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