Texas Instruments SimpleLink CC2620 Technical Reference Manual page 637

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7.8.1.91 FSM_ERA_PUL Register (Offset = 226Ch) [reset = 40BB8h]
FSM_ERA_PUL is shown in
Internal. Only to be used through TI provided API.
31 30 29 28
15 14 13 12
RESERVED
R-0h
Bit Field
31-20 RESERVED
19-16 MAX_EC_LEVEL
15-12 RESERVED
11-0 MAX_ERA_PUL
SWCU117C – February 2015 – Revised September 2015
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Figure 7-100 and described in
Figure 7-100. FSM_ERA_PUL Register
27 26 25 24
RESERVED
R-0h
11 10 9 8
Table 7-94. FSM_ERA_PUL Register Field Descriptions
Type Reset
R 0h
R/W 4h
R 0h
R/W BB8h
Copyright © 2015, Texas Instruments Incorporated
Table 7-94.
23 22 21 20
7 6 5 4
MAX_ERA_PUL
R/W-BB8h
Description
Internal. Only to be used through TI provided API.
Internal. Only to be used through TI provided API.
Internal. Only to be used through TI provided API.
Internal. Only to be used through TI provided API.
Versatile Instruction Memory System (VIMS)
VIMS Registers
19 18 17 16
MAX_EC_LEVEL
R/W-4h
3 2 1 0
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