Texas Instruments SimpleLink CC2620 Technical Reference Manual page 235

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4.1.7.1 Exception Entry
Exception entry occurs when there is a pending exception with sufficient priority and either the processor
is in thread mode or the new exception is of a higher priority than the exception being handled, in which
case the new exception preempts the original exception.
When one exception preempts another, the exceptions are nested.
Sufficient priority means the exception has more priority than any limits set by the mask registers (see
PRIMASK on Priority Mask Register, FAULTMASK on Fault Mask Register, and BASEPRI on Base
Priority Register). An exception with less priority than this is pending but is not handled by the processor.
When the processor takes an exception, unless the exception is a tail-chained or a late-arriving exception,
the processor pushes information onto the current stack. This operation is referred to as stacking and the
structure of eight data words is referred to as stack frame.
Immediately after stacking, the stack pointer indicates the lowest address in the stack frame.
The stack frame includes the return address, which is the address of the next instruction in the interrupted
program. This value is restored to the PC at exception return so that the interrupted program resumes.
In parallel to the stacking operation, the processor performs a vector fetch that reads the exception
handler start address from the vector table. When stacking completes, the processor starts executing the
exception handler. At the same time, the processor writes an EXC_RETURN value to the LR, indicating
which stack pointer corresponds to the stack frame and what operation mode the processor was in before
the entry occurred.
If no higher priority exception occurs during exception entry, the processor starts executing the exception
handler and automatically changes the status of the corresponding pending interrupt to active.
If another higher priority exception occurs during exception entry, known as late arrival, the processor
starts executing the exception handler for this exception and does not change the pending status of the
earlier exception.
4.1.7.2 Exception Return
Exception return occurs when the processor is in handler mode and executes one of the following
instructions to load the EXC_RETURN value into the PC:
• An LDM or POP instruction that loads the PC
• A BX instruction using any register
• An LDR instruction with the PC as the destination
EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism relies on
this value to detect when the processor completes an exception handler. The lowest 4 bits of this value
provide information on the return stack and processor mode.
with a description of the exception return behavior.
EXC_RETURN bits 31–4 are all set. When this value is loaded into the PC, it indicates to the processor
that the exception is complete, and the processor initiates the appropriate exception return sequence.
SWCU117C – February 2015 – Revised September 2015
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Figure 4-2. Exception Stack Frame
...
{aligner}
xPSR
PC
LR
R12
R3
R2
R1
R0
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Pre-IRQ top of stack
IRQ top of stack
Table 4-3 lists the EXC_RETURN values
Exception Model
235
Interrupts and Events