Texas Instruments SimpleLink CC2620 Technical Reference Manual page 479

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6.2.4.5 CLKLOADCTL Register (Offset = 28h) [reset = 2h]
CLKLOADCTL is shown in
Clock Load Control
31 30
23 22
15 14
7 6
Bit Field
31-2 RESERVED
1 LOAD_DONE
SWCU117C – February 2015 – Revised September 2015
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Figure 6-44 and described in
Figure 6-44. CLKLOADCTL Register
29 28
RESERVED
R-0h
21 20
RESERVED
R-0h
13 12
RESERVED
R-0h
5 4
RESERVED
R-0h
Table 6-49. CLKLOADCTL Register Field Descriptions
Type Reset
R 0h
R 1h
Copyright © 2015, Texas Instruments Incorporated
Table 6-49.
27 26
19 18
11 10
3 2
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Status of LOAD.
Will be cleared to 0 when any of the registers requiring a LOAD is
written to, and be set to 1 when a LOAD is done.
Note that writing no change to a register will result in the
LOAD_DONE being cleared.
0 : One or more registers have been write accessed after last LOAD
1 : No registers are write accessed after last LOAD
Power, Reset, and Clock Management
PRCM Registers
25 24
17 16
9 8
1 0
LOAD_DONE LOAD
R-1h W-0h
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