Texas Instruments SimpleLink CC2620 Technical Reference Manual page 455

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Table 6-27. RESETCTL Register Field Descriptions (continued)
Bit Field
3-1 RESET_SRC
0 RESERVED
SWCU117C – February 2015 – Revised September 2015
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Type Reset Description
R 0h Shows the source of the last system reset:
Occurrence of one of the reset sources may trigger several other
reset sources as essential parts of the system are undergoing reset.
This field will report the root cause of the reset (not the other resets
that are consequence of the system reset).
To support this feature the actual register is not captured before the
reset source being released. If a new reset source is triggered, in a
window of four 32 kHz periods after the previous has been released,
this register may indicate Power on reset as source.
0h = Power on reset
1h = Reset pin
2h = Brown out detect on VDDS
3h = Brown out detect on VDD
4h = Brown out detect on VDDR
5h = Clock loss detect
6h = Software reset via SYSRESET register
7h = Software reset via PRCM warm reset request
R 0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Copyright © 2015, Texas Instruments Incorporated
PRCM Registers
Power, Reset, and Clock Management
455