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Jtag Commands - Texas Instruments SimpleLink CC2620 Technical Reference Manual

Zigbee rf4ce wireless mcu simplelink cc13 series; simplelink cc26 series

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5.2.1 JTAG Commands

cJTAG commands are conveyed through benign JTAG scan activity.
The following are three basic steps:
1. Loading an inert opcode
2. Setting control level 2
3. Issue commands
Before cJTAG commands are issued, the controller must ensure the scan activity will not initiate any
unexpected actions in the device. To accomplish this, an inert opcode such as BYPASS or IDCODE must
be loaded into the instruction register. Normally bypass is used, because its value (all ones) is dictated by
the IEEE 1149.1 specification.
Command detection is enabled by performing two zero bit scans (ZBS), then a 1-bit shift. A ZBS is
defined as a scan sequence which traverses through the Capture DR state and eventually the Update DR
state, without ever touching the Shift DR state. The scan sequence can enter Pause DR state for any
number of clocks, or skip the Pause DR state altogether. Each successive ZBS increments the control
level. The control level is locked when the first Shift DR state occurs.
When the control level is locked, commands are issued by pairs of DR scans, and sometimes a third DR
scan. The number of clocks spent in the Shift DR state is counted for each scan (from 0 to 31 clocks). The
first DR scan, command part 0 (CP0) forms the opcode of the command. The second DR scan, command
part 1 (CP1), provides additional information about the command. This may be more opcode bits or a data
field, depending upon the opcode.
There are three commands (SCNB, SCNS, and CIDA) which require a third DR scan, command part 2
(CP2), to transport data in or out of the device.
OPCODE
00000
SWCU117C – February 2015 – Revised September 2015
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Table 5-4
Table 5-4. cJTAG Commands
Instruction
STMC Store Miscellaneous Control
Operand: bbbxy
bbb
State control
xy
0
0
1
2
3
Scan Control
x
1
0
1
Ready Control
RDYC = xy
2
With a scan format other than the MScan scan format, the number of logic 1
RDY bits preceding the last bit of the SP payload is xy + 1
Delay control (DLYC)
DLYC = xy
xy
3
0
1
2
3
4-7
Reserved
Copyright © 2015, Texas Instruments Incorporated
shows the commands.
NOP
ExitCmdLev (ECL)
Exit/suspend (SUSPEND = 1)
ZBS Inhibit (ZBSINH = 1)
Scan Group Candidate (SGC)
SGC = y
Conditional Group Member (CGM)
CGM = y
No DTS delay is added
Add one TCKC signal period
Add two TCKC signal periods
Add a variable number of TCKC signal periods
cJTAG
395
JTAG Interface

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