Texas Instruments SimpleLink CC2620 Technical Reference Manual page 188

Cortex-M3 Processor Registers
2.7.4.45 ID_AFR0 Register (Offset = D4Ch) [reset = 0h]
ID_AFR0 is shown in
Auxiliary Feature 0
This register provides some freedom for implementation defined features to be registered. Not used in
Cortex-M.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 RESERVED
188
Figure 2-115 and described in
Figure 2-115. ID_AFR0 Register
RESERVED
Table 2-141. ID_AFR0 Register Field Descriptions
Type Reset
R 0h
Copyright © 2015, Texas Instruments Incorporated
Table 2-141.
9
R-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
8 7 6 5 4 3 2 1
Submit Documentation Feedback
0