Texas Instruments SimpleLink CC2620 Technical Reference Manual page 275

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4.7.2.3 CPUIRQSEL2 Register (Offset = 8h) [reset = 1Eh]
CPUIRQSEL2 is shown in
Output Selection for CPU Interrupt 2
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-7 RESERVED
6-0 EV
SWCU117C – February 2015 – Revised September 2015
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Figure 4-12 and described in
Figure 4-12. CPUIRQSEL2 Register
RESERVED
R-0h
Table 4-17. CPUIRQSEL2 Register Field Descriptions
Type Reset
R 0h
R 1Eh
Copyright © 2015, Texas Instruments Incorporated
Table 4-17.
9
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Read only selection value
1Eh = Combined Interrupt for CPE Generated events.
Corresponding flags are here RFC_DBELL:RFCPEIFG. Only
interrupts selected with CPE1 in RFC_DBELL:RFCPEIFG can trigger
a RFC_CPE_1 event.
Interrupts and Events Registers
8 7 6 5 4 3 2 1
EV
R-1Eh
Interrupts and Events
0
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