Texas Instruments SimpleLink CC2620 Technical Reference Manual page 298

Interrupts and Events Registers
4.7.2.26 CPUIRQSEL25 Register (Offset = 64h) [reset = 26h]
CPUIRQSEL25 is shown in
Output Selection for CPU Interrupt 25
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-7 RESERVED
6-0 EV
298
Interrupts and Events
Figure 4-35 and described in
Figure 4-35. CPUIRQSEL25 Register
RESERVED
R-0h
Table 4-40. CPUIRQSEL25 Register Field Descriptions
Type Reset
R 0h
R 26h
Copyright © 2015, Texas Instruments Incorporated
Table 4-40.
9
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Read only selection value
26h = DMA bus error, corresponds to UDMA0:ERROR.STATUS
SWCU117C – February 2015 – Revised September 2015
www.ti.com
8 7 6 5 4 3 2 1
EV
R-26h
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