This chapter describes the cJTAG and JTAG interface for on-chip debug support.
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Topic
5.1
Top Level Debug System
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5.2
cJTAG
5.3
ICEPick
5.4
ICEMelter
5.5
Serial Wire Viewer (SWV)
5.6
Halt In Boot (HIB)
5.7
Debug and Shutdown
5.8
Debug Features Supported Through WUC TAP
5.9
Profiler Register
SWCU117C – February 2015 – Revised September 2015
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Copyright © 2015, Texas Instruments Incorporated
SWCU117C – February 2015 – Revised September 2015
JTAG Interface
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Chapter 5
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JTAG Interface