Texas Instruments SimpleLink CC2620 Technical Reference Manual page 182

Cortex-M3 Processor Registers
2.7.4.39 MMFAR Register (Offset = D34h) [reset = X]
MMFAR is shown in
Mem Manage Fault Address
This register is used to read the address of the location that caused a Memory Manage Fault.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 ADDRESS
182
Figure 2-109 and described in
Figure 2-109. MMFAR Register
ADDRESS
Table 2-135. MMFAR Register Field Descriptions
Type Reset
R/W X
Copyright © 2015, Texas Instruments Incorporated
Table 2-135.
R/W-X
Description
Mem Manage fault address field.
This field is the data address of a faulted load or store attempt.
When an unaligned access faults, the address is the actual address
that faulted. Because an access can be split into multiple parts, each
aligned, this address can be any offset in the range of the requested
size. Flags CFSR.IACCVIOL, CFSR.DACCVIOL
,CFSR.MUNSTKERR and CFSR.MSTKERR in combination with
CFSR.MMARVALIDindicate the cause of the fault.
SWCU117C – February 2015 – Revised September 2015
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