Texas Instruments SimpleLink CC2620 Technical Reference Manual page 201

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Table 2-152. DHCSR Register Field Descriptions (continued)
Bit Field
0 C_DEBUGEN
SWCU117C – February 2015 – Revised September 2015
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Type Reset Description
R/W 0h Enables debug. This can only be written by AHB-AP and not by the
core. It is ignored when written by the core, which cannot set or clear
it. The core must write a 1 to it when writing C_HALT to halt itself.
The values of C_HALT, C_STEP and C_MASKINTS are ignored by
hardware when C_DEBUGEN = 0. The read values for C_HALT,
C_STEP and C_MASKINTS fields will be unknown to software when
C_DEBUGEN = 0.
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Cortex-M3 Processor Registers
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