Texas Instruments SimpleLink CC2620 Technical Reference Manual page 149

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Table 2-109. NVIC_ICPR0 Register Field Descriptions (continued)
Bit Field
20 CLRPEND20
19 CLRPEND19
18 CLRPEND18
17 CLRPEND17
16 CLRPEND16
15 CLRPEND15
14 CLRPEND14
13 CLRPEND13
12 CLRPEND12
11 CLRPEND11
10 CLRPEND10
9 CLRPEND9
8 CLRPEND8
7 CLRPEND7
6 CLRPEND6
5 CLRPEND5
4 CLRPEND4
3 CLRPEND3
SWCU117C – February 2015 – Revised September 2015
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Type Reset Description
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 20 (See EVENT:CPUIRQSEL20.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 19 (See EVENT:CPUIRQSEL19.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 18 (See EVENT:CPUIRQSEL18.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 17 (See EVENT:CPUIRQSEL17.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 16 (See EVENT:CPUIRQSEL16.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 15 (See EVENT:CPUIRQSEL15.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 14 (See EVENT:CPUIRQSEL14.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 13 (See EVENT:CPUIRQSEL13.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 12 (See EVENT:CPUIRQSEL12.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 11 (See EVENT:CPUIRQSEL11.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 10 (See EVENT:CPUIRQSEL10.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 9 (See EVENT:CPUIRQSEL9.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 8 (See EVENT:CPUIRQSEL8.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 7 (See EVENT:CPUIRQSEL7.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 6 (See EVENT:CPUIRQSEL6.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 5 (See EVENT:CPUIRQSEL5.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 4 (See EVENT:CPUIRQSEL4.EV
for details). Reading the bit returns its current state.
R/W 0h
Writing 0 to this bit has no effect, writing 1 to this bit clears the
corresponding pending interrupt 3 (See EVENT:CPUIRQSEL3.EV
for details). Reading the bit returns its current state.
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Cortex-M3 Processor Registers
149