Texas Instruments SimpleLink CC2620 Technical Reference Manual page 198

Cortex-M3 Processor Registers
2.7.4.55 CPACR Register (Offset = D88h) [reset = 0h]
CPACR is shown in
Coprocessor Access Control
This register specifies the access privileges for coprocessors.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 RESERVED
198
Figure 2-125 and described in
Figure 2-125. CPACR Register
RESERVED
Table 2-151. CPACR Register Field Descriptions
Type Reset
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 2-151.
R/W-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
9 8 7 6 5 4 3 2
Submit Documentation Feedback
1 0