Texas Instruments SimpleLink CC2620 Technical Reference Manual page 810

AES Cryptoprocessor Overview
10.1.4.5.1 Second Key Registers (Internal, But Clearable)
The following registers shown in
reading and writing. These registers are used to store internally calculated key information and
intermediate results. However, when the host performs a write to the any of the respective AESKEY2__0
to AESKEY2__3 or
AESKEY3__0 to AESKEY3__3 addresses, respectively, the whole 128-bit AESKEY2__0 to AESKEY2__3
or
AESKEY3__0 to AESKEY3__3 register is cleared to zeroes.
The intermediate authentication result for CCM is stored in the AESKEY3__0 to AESKEY3__3 register.
AESKEY2__0 - AESKEY2__3 (Write Only), 32-bit Address Offset: 0x500 - 0x50C in 0x4-byte increments
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
0 0 0 0 0 0 0
AESKEY3__0 - AESKEY3__3 (Write Only), 32-bit Address Offset: 0x510 - 0x51C in 0x4-byte increments
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
AESKEY3__0 - AESKEY3__3[127:96] / AESKEY2__0 - AESKEY2__3[255:224]
0 0 0 0 0 0 0
For CCM:
Bit
255:0
For CBC-MAC:
Bit
255:0
Reusing the AES_KEYn registers is allowed for sequential operations; however for CBC-MAC,
intermediate values must be cleared when programming the respective mode and length parameters.
If a CBC-MAC operation is started without loading a new key (through the key store), and the previous
operation was not a CBC-MAC operation, both AESKEY2__0 to AESKEY2__3 and
AESKEY3__0 to AESKEY3__3 register locations must be written before starting the CBC-MAC operation,
which is required to clear these two key registers.
10.1.4.5.2 AES Initialization Vector (IV) Registers
Table 10-6 shows the AES Initialization Vector registers that are used to provide and read the IV from the
AES engine.
810
Cryptography
Table 10-4
Table 10-4. AES_KEY
AESKEY2__0 - AESKEY2__3[31:0]
AESKEY2__0 - AESKEY2__3[63:32]
AESKEY2__0 - AESKEY2__3[95:64]
AESKEY2__0 - AESKEY2__3[127:96]
0 0 0 0 0 0 0
Table 10-5. AES_KEY
AESKEY3__0 - AESKEY3__3[31:0] / AESKEY2__0 - AESKEY2__3[159:128]
AESKEY3__0 - AESKEY3__3[63:32] / AESKEY2__0 - AESKEY2__3[191:160]
AESKEY3__0 - AESKEY3__3[95:64] / AESKEY2__0 - AESKEY2__3[223:192]
0 0 0 0 0 0 0
Copyright © 2015, Texas Instruments Incorporated
and Table 10-5 are not accessible through the host for
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Field Name
–
Field Name
Zeroes
SWCU117C – February 2015 – Revised September 2015
9 8 7 6 5 4 3
0 0 0 0 0 0 0
9 8 7 6 5 4 3
0 0 0 0 0 0 0
Function
This register is used to store intermediate
values.
Function
This register must remain zero.
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2 1 0
0 0 0
2 1 0
0 0 0