Texas Instruments SimpleLink CC2620 Technical Reference Manual page 795

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9.2.1.74 PWD_CURR_65C Register (Offset = 3A8h) [reset = 1C259C14h]
PWD_CURR_65C is shown in
Power Down Current Control 65C
31 30 29 28
DELTA_CACHE_REF
15 14 13 12
DELTA_XOSC_LPM
Bit Field
31-24 DELTA_CACHE_REF
23-16 DELTA_RFMEM_RET
15-8 DELTA_XOSC_LPM
7-0 BASELINE
SWCU117C – February 2015 – Revised September 2015
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Figure 9-96 and described in
Figure 9-96. PWD_CURR_65C Register
27 26 25
R-1Ch
11 10 9
R-9Ch
Table 9-98. PWD_CURR_65C Register Field Descriptions
Type Reset
R 1Ch
R 25h
R 9Ch
R 14h
Copyright © 2015, Texas Instruments Incorporated
Table 9-98.
24 23 22 21
DELTA_RFMEM_RET
8 7 6 5
Description
Additional maximum current, in units of 1 µA, with cache retention
Additional maximum current, in 1 µA units, with RF memory retention
Additional maximum current, in units of 1 µA, with XOSC_HF on in
low-power mode
Worst-case baseline maximum power-down current, in units of 0.5
µA
Factory Configuration (FCFG)
20 19 18 17
R-25h
4 3 2 1
BASELINE
R-14h
Device Configuration
16
0
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