Texas Instruments SimpleLink CC2620 Technical Reference Manual page 92

Cortex-M3 Processor Registers
2.7.3.4 STIM3 Register (Offset = Ch) [reset = X]
STIM3 is shown in
Stimulus Port 3
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 STIM3
92
Figure 2-37 and described in
Figure 2-37. STIM3 Register
Table 2-62. STIM3 Register Field Descriptions
Type Reset
R/W X
Copyright © 2015, Texas Instruments Incorporated
Table 2-62.
STIM3
R/W-X
Description
A write to this location causes data to be written into the FIFO if
TER.STIMENA3 is set. Reading from the stimulus port returns the
FIFO status in bit [0]: 0 = full, 1 = not full. The polled FIFO interface
does not provide an atomic read-modify-write, so it's users
responsibility to ensure exclusive read-modify-write if this ITM port is
used concurrently by interrupts or other threads.
SWCU117C – February 2015 – Revised September 2015
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