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Texas Instruments SimpleLink CC2620 Technical Reference Manual page 677

Zigbee rf4ce wireless mcu simplelink cc13 series; simplelink cc26 series

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Table 8-2
specifies which serial interface signals are configured to specific DIOs. These pins are fixed and
cannot be reconfigured.
Signal
UART0 RX
UART0 TX
SSI0 Clk
SSI0 Fss
SSI0 RX
SSI0 TX
The bootloader initially configures only the input pins on the two serial interfaces. By default, all I/O pins
have their input buffers disabled, so the bootloader configures the required pins to be input pins so that
the bootloader interface is not accessible from a host before this point in time. For this initial configuration
of input pins, the firmware configures the IOC to route the input signals listed in
corresponding peripheral signals.
The bootloader selects the interface that is the first to be accessed by the external device. Once selected,
the TX output pin for the selected interface is configured; the module on the inactive interface (UART0 or
SSI0) is disabled. To switch to the other interface, the CC26xx and CC13xx devices must be reset. The
delayed configuration of the TX pin imposes special consideration on an SSI0 master device regarding the
transfer of the first byte of the first packet. See
8.2.2.1
UART Transport
The connections required to use the UART port are the following two pins: UART0 TX and UART0 RX.
The device communicating with the bootloader drives the UART0 RX pin on the CC26xx and CC13xx,
while the CC26xx and CC13xx devices drive the UART0 TX pin.
While the baud rate is flexible, the UART serial format is fixed at 8 data bits, no parity, and 1 stop bit. The
bootloader automatically detects the baud rate for communication. The only requirement is that the baud
rate must be no more than 1/16 of the frequency of the UART module clock in CC26xx and CC13xx
devices.
8.2.2.1.1 UART Baud Rate Automatic Detection
The bootloader provides a method to automatically detect the UART baud rate being used to
communicate with it.
To synchronize with the host, the bootloader must to receive 2 bytes with the value of 0x55. If
synchronization succeeds, the bootloader returns an acknowledge consisting of 2 bytes with the values of
0x00 and 0xCC.
If synchronization fails, the bootloader waits for synchronization attempts.
In the automatic-detection function, the UART0 RX pin is monitored for edges using GPIO interrupts.
When enough edges are detected, the bootloader determines the ratio of baud rate and frequency needed
to program the UART.
The UART module system clock must be at least 16 times the baud rate; thus, the maximum baud rate
can be no higher than 3 Mbaud (48 MHz divided by 16). The maximum baud rate is restricted to 1.6
Mbaud because of the firmware function that detects the transfer rate of the host.
SWCU117C – February 2015 – Revised September 2015
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Table 8-2. Configuration of Serial Interfaces
QFN48 / 7x7
DIO2
DIO3
DIO10
DIO11
DIO9
DIO8
(Is the wording in this section correct as is?)
Copyright © 2015, Texas Instruments Incorporated
QFN32 / 5x5
DIO1
DIO0
DIO10
DIO9
DIO11
DIO12
Section
8.2.2.2.
Bootloader Interfaces
QFN32 / 4x4
DIO1
DIO2
DIO8
DIO7
DIO9
DIO0
Table 8-2
to their
Bootloader
677

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