Texas Instruments SimpleLink CC2620 Technical Reference Manual page 126

Cortex-M3 Processor Registers
2.7.3.36 LAR Register (Offset = FB0h) [reset = 0h]
LAR is shown in Figure 2-69
Lock Access
This register is used to prevent write accesses to the Control Registers: TER, TPR and TCR.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 LOCK_ACCESS
126
and described in Table 2-94.
Figure 2-69. LAR Register
LOCK_ACCESS
W-0h
Table 2-94. LAR Register Field Descriptions
Type Reset Description
W 0h
A privileged write of 0xC5ACCE55 enables more write access to
Control Registers TER, TPR and TCR. An invalid write removes
write access.
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SWCU117C – February 2015 – Revised September 2015
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