Texas Instruments SimpleLink CC2620 Technical Reference Manual page 132

Cortex-M3 Processor Registers
2.7.4.3 STCSR Register (Offset = 10h) [reset = 4h]
STCSR is shown in
SysTick Control and Status
This register enables the SysTick features and returns status flags related to SysTick.
31 30
23 22
15 14
7 6
Bit Field
31-17 RESERVED
16 COUNTFLAG
15-3 RESERVED
2 CLKSOURCE
1 TICKINT
0 ENABLE
132
Figure 2-73 and described in
Figure 2-73. STCSR Register
29 28
RESERVED
21 20
RESERVED
R-0h
13 12
RESERVED
5 4
RESERVED
R-0h
Table 2-99. STCSR Register Field Descriptions
Type Reset
R 0h
R 0h
R 0h
R 1h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 2-99.
27 26
R-0h
19 18
11 10
R-0h
3 2
CLKSOURCE
R-1h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Returns 1 if timer counted to 0 since last time this was read. Clears
on read by application of any part of the SysTick Control and Status
Register. If read by the debugger using the DAP, this bit is cleared
on read-only if the MasterType bit in the **AHB-AP** Control
Register is set to 0. Otherwise, COUNTFLAG is not changed by the
debugger read.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Clock source:
0: External reference clock.
1: Core clock
External clock is not available in this device. Writes to this field will
be ignored.
0: Counting down to zero does not pend the SysTick handler.
Software can use COUNTFLAG to determine if the SysTick handler
has ever counted to zero.
1: Counting down to zero pends the SysTick handler.
Enable SysTick counter
0: Counter disabled
1: Counter operates in a multi-shot way. That is, counter loads with
the Reload value STRVR.RELOAD and then begins counting down.
On reaching 0, it sets COUNTFLAG to 1 and optionally pends the
SysTick handler, based on TICKINT. It then loads STRVR.RELOAD
again, and begins counting.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
25 24
17 16
COUNTFLAG
R-0h
9 8
1 0
TICKINT ENABLE
R/W-0h R/W-0h
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