Texas Instruments SimpleLink CC2620 Technical Reference Manual page 458

PRCM Registers
6.2.3.1 MCUCLK Register (Offset = 0h) [reset = 0h]
MCUCLK is shown in
MCU Clock Management
This register contains bitfields related to the MCU clock.
31 30
23 22
15 14
7 6
Bit Field
31-3 RESERVED
2 RCOSC_HF_CAL_DONE
1-0 PWR_DWN_SRC
458
Power, Reset, and Clock Management
Figure 6-26 and described in
Figure 6-26. MCUCLK Register
29 28
RESERVED
21 20
RESERVED
13 12
RESERVED
5 4
RESERVED
R-0h
Table 6-30. MCUCLK Register Field Descriptions
Type Reset
R 0h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 6-30.
27 26
R-0h
19 18
R-0h
11 10
R-0h
3 2
RCOSC_HF_C
AL_DONE
R/W-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
MCU bootcode will set this bit when RCOSC_HF is calibrated. The
FLASH can not be used until this bit is set.
1: RCOSC_HF is calibrated to 48 MHz, allowing FLASH to power
up.
0: RCOSC_HF is not yet calibrated, ie FLASH must not assume that
the SCLK_HF is safe
Controls the clock source for the entire MCU domain while MCU is
requesting powerdown.
When MCU requests powerdown with SCLK_HF as source, then
WUC will switch over to this clock source during powerdown, and
automatically switch back to SCLK_HF when MCU is no longer
requesting powerdown and system is back in active mode.
0h = No clock in Powerdown
1h = Use SCLK_LF in Powerdown
SWCU117C – February 2015 – Revised September 2015
www.ti.com
25 24
17 16
9 8
1 0
PWR_DWN_SRC
R/W-0h
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