Texas Instruments SimpleLink CC2620 Technical Reference Manual page 735

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9.2.1.16 CONFIG_MISC_ADC_DIV10 Register (Offset = FCh) [reset = FFFFFFFFh]
CONFIG_MISC_ADC_DIV10 is shown in
Configuration of IFADC in Divide-by-10 Mode
Divide-by-10 mode is only available for CC13xx.
31 30
23 22
15 14
7 6
QUANTCTLTHRES
R-7h
Table 9-40. CONFIG_MISC_ADC_DIV10 Register Field Descriptions
Bit Field
31-17 RESERVED
16-9 RSSI_OFFSET
8-6 QUANTCTLTHRES
5-0 DACTRIM
SWCU117C – February 2015 – Revised September 2015
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Figure 9-38
Figure 9-38. CONFIG_MISC_ADC_DIV10 Register
29 28
RESERVED
R-7FFFh
21 20
RESERVED
R-7FFFh
13 12
RSSI_OFFSET
R-FFh
5 4
Type Reset Description
R 7FFFh
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
R FFh Value for RSSI measured in production test.
Value is read by RF Core ROM FW during RF Core initialization.
R 7h Trim value for ADI_0_RF:IFADCQUANT0.TH.
Value is read by RF Core ROM FW during RF Core initialization.
R 3Fh Trim value for ADI_0_RF:IFADCDAC.TRIM.
Value is read by RF Core ROM FW during RF Core initialization.
Copyright © 2015, Texas Instruments Incorporated
and described in Table 9-40.
27 26
19 18
11 10
3 2
DACTRIM
R-3Fh
Factory Configuration (FCFG)
25 24
17 16
RSSI_OFFSET
R-FFh
9 8
QUANTCTLTH
RES
R-7h
1 0
735
Device Configuration