Texas Instruments SimpleLink CC2620 Technical Reference Manual page 37

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2.5.2.8 Cortex General-Purpose Register 7 (R7)
Address Offset
Physical Address
Description
Type
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits Field Name
31–0 DATA
2.5.2.9 Cortex General-Purpose Register 8 (R8)
Address Offset
Physical Address
Description
Type
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits Field Name
31–0 DATA
2.5.2.10 Cortex General-Purpose Register 9 (R9)
Address Offset
Physical Address
Description
Type
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits Field Name
31–0 DATA
SWCU117C – February 2015 – Revised September 2015
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Table 2-10. Cortex General-Purpose Register 7 (R7)
The R7 registers are 32-bit general-purpose registers for data operations and can be accessed from
either privileged or unprivileged mode.
R/W
Description
Register data
Table 2-11. Cortex General-Purpose Register 8 (R8)
The R8 registers are 32-bit general-purpose registers for data operations and can be accessed from
either privileged or unprivileged mode.
R/W
Description
Register data
Table 2-12. Cortex General-Purpose Register 9 (R9)
The R9 registers are 32-bit general-purpose registers for data operations and can be accessed from
either privileged or unprivileged mode.
R/W
Description
Register data
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Reset
Instance
9
DATA
Reset
Instance
9
DATA
Reset
Instance
9
DATA
Cortex-M3 Core Registers
–
8 7 6 5 4 3 2 1
Type Reset
R/W —
–
8 7 6 5 4 3 2 1
Type Reset
R/W —
–
8 7 6 5 4 3 2 1
Type Reset
R/W —
0
0
0
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