Texas Instruments SimpleLink CC2620 Technical Reference Manual page 122

Cortex-M3 Processor Registers
Bit Field
9 STIMENA9
8 STIMENA8
7 STIMENA7
6 STIMENA6
5 STIMENA5
4 STIMENA4
3 STIMENA3
2 STIMENA2
1 STIMENA1
0 STIMENA0
122
Table 2-91. TER Register Field Descriptions (continued)
Type Reset
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Description
Bit mask to enable tracing on ITM stimulus port 9.
Bit mask to enable tracing on ITM stimulus port 8.
Bit mask to enable tracing on ITM stimulus port 7.
Bit mask to enable tracing on ITM stimulus port 6.
Bit mask to enable tracing on ITM stimulus port 5.
Bit mask to enable tracing on ITM stimulus port 4.
Bit mask to enable tracing on ITM stimulus port 3.
Bit mask to enable tracing on ITM stimulus port 2.
Bit mask to enable tracing on ITM stimulus port 1.
Bit mask to enable tracing on ITM stimulus port 0.
SWCU117C – February 2015 – Revised September 2015
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