Texas Instruments SimpleLink CC2620 Technical Reference Manual page 305

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4.7.2.33 CPUIRQSEL32 Register (Offset = 80h) [reset = 73h]
CPUIRQSEL32 is shown in
Output Selection for CPU Interrupt 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-7 RESERVED
6-0 EV
SWCU117C – February 2015 – Revised September 2015
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Figure 4-42 and described in
Figure 4-42. CPUIRQSEL32 Register
RESERVED
R-0h
Table 4-47. CPUIRQSEL32 Register Field Descriptions
Type Reset
R 0h
R 73h
Copyright © 2015, Texas Instruments Incorporated
Table 4-47.
9
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Read only selection value
73h = AUX ADC interrupt event, corresponds to
AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags are found
here AUX_EVCTL:EVTOMCUFLAGS
Interrupts and Events Registers
8 7 6 5 4 3 2 1
EV
R-73h
Interrupts and Events
0
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