Texas Instruments SimpleLink CC2620 Technical Reference Manual page 690

Customer Configuration (CCFG)
9.1.1.1 EXT_LF_CLK Register (Offset = FA8h) [reset = FFFFFFFFh]
EXT_LF_CLK is shown in
Extern LF clock configuration
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
DIO
R/W-FFh
Bit Field
31-24 DIO
23-0 RTC_INCREMENT
690
Device Configuration
Figure 9-1 and described in
Figure 9-1. EXT_LF_CLK Register
Table 9-2. EXT_LF_CLK Register Field Descriptions
Type Reset Description
R/W FFh
Unsigned integer, selecting the DIO to supply external 32-kHz clock
as SCLK_LF when MODE_CONF.SCLK_LF_OPTION is set to
EXTERNAL. The selected DIO will be marked as reserved by the pin
driver and must therefore be set to 255 (0xFF) when unused.
R/W FFFFFFh
Unsigned integer, defining the input frequency of the external clock
and is written to AON_RTC:SUBSECINC.VALUEINC. Defined as
follows: EXT_LF_CLK.RTC_INCREMENT = 2
InputClockFrequency in Hertz (for example,
RTC_INCREMENT=0x800000 for InputClockFrequency=32768 Hz)
Copyright © 2015, Texas Instruments Incorporated
Table 9-2.
9 8 7
RTC_INCREMENT
R/W-FFFFFFh
SWCU117C – February 2015 – Revised September 2015
www.ti.com
6 5 4 3 2 1 0
38
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