Texas Instruments SimpleLink CC2620 Technical Reference Manual page 775

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9.2.1.54 CONFIG_IF_ADC Register (Offset = 34Ch) [reset = X]
CONFIG_IF_ADC is shown in
Configuration of IF_ADC
31 30
23 22
INT3ADJ
15 14
AAFCAP
R-3h
7 6
IFDIGLDO_TRIM_OUTPUT
R-X
Bit Field
31-28 FF2ADJ
27-24 FF3ADJ
23-20 INT3ADJ
19-16 FF1ADJ
15-14 AAFCAP
13-10 INT2ADJ
9-5 IFDIGLDO_TRIM_OUTPU R
T
4-0 IFANALDO_TRIM_OUTP
UT
SWCU117C – February 2015 – Revised September 2015
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Figure 9-76 and described in
Figure 9-76. CONFIG_IF_ADC Register
29 28
FF2ADJ
R-3h
21 20
R-6h
13 12
5 4
Table 9-78. CONFIG_IF_ADC Register Field Descriptions
Type Reset
R 3h
R 4h
R 6h
R 0h
R 3h
R Dh
X
R X
Copyright © 2015, Texas Instruments Incorporated
Table 9-78.
27 26
19 18
11 10
INT2ADJ
R-Dh
3 2
IFANALDO_TRIM_OUTPUT
R-X
Description
Trim value for ADI_0_RF:IFADCLFCFG1.FF2ADJ.
Value is read by RF Core ROM FW during RF Core initialization.
Trim value for ADI_0_RF:IFADCLFCFG1.FF3ADJ.
Value is read by RF Core ROM FW during RF Core initialization.
Trim value for ADI_0_RF:IFADCLFCFG0.INT3ADJ.
Value is read by RF Core ROM FW during RF Core initialization.
Trim value for ADI_0_RF:IFADCLFCFG0.FF1ADJ.
Value is read by RF Core ROM FW during RF Core initialization.
Trim value for ADI_0_RF:IFADCCTL0.AAFCAP.
Value is read by RF Core ROM FW during RF Core initialization.
Trim value for ADI_0_RF:IFADCCTL0.INT2ADJ.
Value is read by RF Core ROM FW during RF Core initialization.
Trim value for ADI_0_RF:IFDLDO2.TRIM_OUT.
Value is read by RF Core ROM FW during RF Core initialization.
Default value holds trim value from production test.
Trim value for ADI_0_RF:IFALDO2.TRIM_OUT.
Value is read by RF Core ROM FW during RF Core initialization.
Default value holds trim value from production test.
Factory Configuration (FCFG)
25 24
FF3ADJ
R-4h
17 16
FF1ADJ
R-0h
9 8
IFDIGLDO_TRIM_OUTPUT
R-X
1 0
Device Configuration
775