Texas Instruments SimpleLink CC2620 Technical Reference Manual page 232

Exception Model
4.1.3 Exception Handlers
The processor handles exceptions using:
• Interrupt Service Routines (ISRs): Interrupts (IRQx) are the exceptions handled by ISRs.
• Fault Handlers: Hard fault, usage fault, and bus fault are fault exceptions handled by the fault
handlers.
• System Handlers: PendSV, SVCall, SysTick, and the fault exceptions are all system exceptions that
are handled by system handlers.
4.1.4 Vector Table
Figure 4-1 contains the reset value of the stack pointer and the start addresses, also called exception
vectors, for all exception handlers. The vector table is constructed using the vector address or offset listed
in Table 4-1. Figure 4-1
bit (LSB) of each vector must be 1, indicating that the exception handler is Thumb code.
On system reset, the vector table is fixed at address 0x0000 0000. Privileged software can write to the
Vector Table Offset Register (CPU_SCS:VTOR) to relocate the vector table start address to a different
memory location, in the range 0x0000 0200 to 0x3FFF FE00. When configuring the CPU_SCS:VTOR
register, the offset must be aligned on a 512-byte boundary.
232
Interrupts and Events
shows the order of the exception vectors in the vector table. The least significant
Figure 4-1. Vector Table
Exception number IRQ number
33 33
.
.
.
18 2
17 1
16 0
15 –1
–2
14
13
12
11 –5
10
9
8
7
6 –10
5 –11
4 –12
3 –13
2 –14
1
Copyright © 2015, Texas Instruments Incorporated
Offset Vector
IRQ33
0x00C4
. .
. .
. .
0x004C
IRQ2
0x0048
IRQ1
0x0044
IRQ0
0x0040
Systick
0x003C
PendSV
0x0038
Reserved
Reserved for debug
SVCall
0x002C
Reserved
Usage fault
0x0018
Bus fault
0x0014
Reserved
0x0010
Hard fault
0x000C
NMI
0x0008
Reset
0x0004
Initial SP value
0x0000
SWCU117C – February 2015 – Revised September 2015
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