Texas Instruments SimpleLink CC2620 Technical Reference Manual page 789

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9.2.1.68 OSC_CONF Register (Offset = 38Ch) [reset = X]
OSC_CONF is shown in
OSC Configuration
31 30
RESERVED
R-3h
23 22
XOSCLF_CMIRRWR_RATIO
R-0h
15 14
7 6
Bit Field
31-30 RESERVED
29 ADC_SH_VBUF_EN
28 ADC_SH_MODE_EN
27 ATESTLF_RCOSCLF_IBI
AS_TRIM
26-25 XOSCLF_REGULATOR_
TRIM
24-21 XOSCLF_CMIRRWR_RA
TIO
20-19 XOSC_HF_FAST_START R
18 XOSC_OPTION
17-0 RESERVED
SWCU117C – February 2015 – Revised September 2015
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Figure 9-90 and described in
Figure 9-90. OSC_CONF Register
29 28
ADC_SH_VBU ADC_SH_MOD
F_EN E_EN
R-1h R-1h
21 20
XOSC_HF_FAST_START
13 12
RESERVED
5 4
RESERVED
Table 9-92. OSC_CONF Register Field Descriptions
Type Reset
R 3h
R 1h
R 1h
R 0h
R 0h
R 0h
1h
R X
R X
Copyright © 2015, Texas Instruments Incorporated
Table 9-92.
27 26
ATESTLF_RC XOSCLF_REGULATOR_TRIM
OSCLF_IBIAS_
TRIM
R-0h
19 18
XOSC_OPTIO
N
R-1h R-X
11 10
R-X
3 2
R-X
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Trim value for
DDI_0_OSC:ADCDOUBLERNANOAMPCTL.ADC_SH_VBUF_EN.
Trim value for
DDI_0_OSC:ADCDOUBLERNANOAMPCTL.ADC_SH_MODE_EN.
Trim value for
DDI_0_OSC:ATESTCTL.ATESTLF_RCOSCLF_IBIAS_TRIM.
Trim value for
DDI_0_OSC:LFOSCCTL.XOSCLF_REGULATOR_TRIM.
Trim value for
DDI_0_OSC:LFOSCCTL.XOSCLF_CMIRRWR_RATIO.
Trim value for DDI_0_OSC:CTL1.XOSC_HF_FAST_START.
This trim value is not relevant for PG1 devices.
0: XOSC_HF unavailable (may not be bonded out)
1: XOSC_HF available (default)
Default value differs depending on partnumber.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Default value holds trim value from production test.
Factory Configuration (FCFG)
25 24
XOSCLF_CMIR
RWR_RATIO
R-0h R-0h
17 16
RESERVED
R-X
9 8
1 0
Device Configuration
789