Texas Instruments SimpleLink CC2620 Technical Reference Manual page 466

PRCM Registers
6.2.3.9 CTL1 Register (Offset = 24h) [reset = 0h]
CTL1 is shown in Figure 6-34
Control 1
This register contains various chip level control and debug bitfields.
31 30
23 22
15 14
7 6
Bit Field
31-2 RESERVED
1 MCU_RESET_SRC
0 MCU_WARM_RESET
466
Power, Reset, and Clock Management
and described in Table
Figure 6-34. CTL1 Register
29 28
RESERVED
R/W-0h
21 20
RESERVED
R/W-0h
13 12
RESERVED
R/W-0h
5 4
RESERVED
R/W-0h
Table 6-38. CTL1 Register Field Descriptions
Type Reset Description
R/W 0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
R/W1C 0h Indicates source of last MCU Voltage Domain warm reset request:
0: MCU SW reset
1: JTAG reset
This bit can only be cleared by writing a 1 to it
R/W1C 0h Indicates type of last MCU Voltage Domain reset:
0: Last MCU reset was not a warm reset
1: Last MCU reset was a warm reset (requested from MCU or JTAG
as indicated in MCU_RESET_SRC)
This bit can only be cleared by writing a 1 to it
Copyright © 2015, Texas Instruments Incorporated
6-38.
27 26
19 18
11 10
3 2
SWCU117C – February 2015 – Revised September 2015
www.ti.com
25 24
17 16
9 8
1 0
MCU_RESET_ MCU_WARM_
SRC RESET
R/W1C-0h R/W1C-0h
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