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Texas Instruments SimpleLink CC2620 Technical Reference Manual page 158

Zigbee rf4ce wireless mcu simplelink cc13 series; simplelink cc26 series

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Cortex-M3 Processor Registers
2.7.4.19 NVIC_IPR2 Register (Offset = 408h) [reset = 0h]
NVIC_IPR2 is shown in
Irq 8 to 11 Priority
This register is used to assign a priority from 0 to 255 to each of the available interrupts. 0 is the highest
priority, and 255 is the lowest. The interpretation of the Interrupt Priority Registers changes based on the
setting in AIRCR.PRIGROUP.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
PRI_11
R/W-0h
Bit
Field
31-24
PRI_11
23-16
PRI_10
15-8
PRI_9
7-0
PRI_8
158
Figure 2-89
and described in
Figure 2-89. NVIC_IPR2 Register
PRI_10
R/W-0h
Table 2-115. NVIC_IPR2 Register Field Descriptions
Type
Reset
R/W
0h
R/W
0h
R/W
0h
R/W
0h
Copyright © 2015, Texas Instruments Incorporated
Table
2-115.
9
PRI_9
R/W-0h
Description
Priority of interrupt 11 (See EVENT:CPUIRQSEL11.EV for details).
Priority of interrupt 10 (See EVENT:CPUIRQSEL10.EV for details).
Priority of interrupt 9 (See EVENT:CPUIRQSEL9.EV for details).
Priority of interrupt 8 (See EVENT:CPUIRQSEL8.EV for details).
SWCU117C – February 2015 – Revised September 2015
www.ti.com
8
7
6
5
4
3
2
1
PRI_8
R/W-0h
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