Texas Instruments SimpleLink CC2620 Technical Reference Manual page 868

Cryptography Registers
10.2.1.37 IRQCLR Register (Offset = 788h) [reset = 0h]
IRQCLR is shown in
Interrupt Clear
31 30
DMA_BUS_ER KEY_ST_WR_ KEY_ST_RD_E
R ERR
W-0h W-0h
23 22
15 14
7 6
Bit Field
31 DMA_BUS_ERR
30 KEY_ST_WR_ERR
29 KEY_ST_RD_ERR
28-2 RESERVED
1 DMA_IN_DONE
0 RESULT_AVAIL
868
Figure 10-39 and described in
Figure 10-39. IRQCLR Register
29 28
RR
W-0h
21 20
RESERVED
13 12
RESERVED
5 4
RESERVED
W-0h
Table 10-47. IRQCLR Register Field Descriptions
Type Reset
W 0h
W 0h
W 0h
W 0h
W 0h
W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 10-47.
27 26
RESERVED
W-0h
19 18
W-0h
11 10
W-0h
3 2
Description
If 1 is written to this bit, IRQSTAT.DMA_BUS_ERR is cleared.
If 1 is written to this bit, IRQSTAT.KEY_ST_WR_ERR is cleared.
If 1 is written to this bit, IRQSTAT.KEY_ST_RD_ERR is cleared.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
If 1 is written to this bit, IRQSTAT.DMA_IN_DONE is cleared.
If 1 is written to this bit, IRQSTAT.RESULT_AVAIL is cleared.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
25 24
17 16
9 8
1 0
DMA_IN_DON RESULT_AVAI
E L
W-0h W-0h
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