Texas Instruments SimpleLink CC2620 Technical Reference Manual page 824

AES Cryptoprocessor Overview
write AESAUTHLEN // write the length of the AAD data block
// configure DMAC to fetch the AAD data
write DMACH0CTL 0x0000_00001 // enable DMA channel 0
write DMACH0EXTADDR <address> // base address of the AAD input data in ext.
memory
write DMACH0LEN <length> // AAD data length in bytes, equal to the AAD
// wait for completion of the AAD data transfer
wait IRQSTAT[1]=='1'// wait for DMA_IN_DONE
check IRQSTAT[31]=='0'// check for the absence of errors
// configure DMAC
write DMACH0CTL 0x0000_00001 // enable DMA channel 0
write DMACH0EXTADDR <address> // base address of the payload data in ext.
memory
write DMACH0LEN <length> // payload data length in bytes, equal to the message
write DMACH1CTL 0x0000_00001 // enable DMA channel 1
write DMACH1EXTADDR <address> // base address of the output data buffer
write DMACH1LEN <length> // output data length in bytes, equal to the result
// wait for completion
wait IRQSTAT[0]=='1'// wait for operation completed
check IRQSTAT[31]=='0'// check for the absence of errors
write ALGSEL 0x0000_0000 // disable the master control/DMA clock
// read tag
wait AESCTL[30]=='1' // wait for the SAVED_CONTEXT_RDY bit [30]
read AESTAGOUT__0 -
AESTAGOUT__3 // this read clears the 'saved_context_ready' flag
// end of algorithm
824
// (may be non-block size aligned)
// length len({aad data})
// (may be non-block size aligned)
// length len({crypto_data})
// data length len({crypto data})
Copyright © 2015, Texas Instruments Incorporated
SWCU117C – February 2015 – Revised September 2015
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