Figure 7-2 Example Interrupt Priority Register; Figure 7-3 Example On-Chip Peripheral And Irq Interrupt Programming; Interrupt Sources - Motorola DSP56800 Manual

Ch0 Ch1 Ch2 Ch3 Ch4 Ch5 Ch6
* Indicates reserved bits, read as zero and should be written with zero for future compatibility
In the example interrupt priority register (IPR), shown in Figure 7-2, the interrupt for each on-chip
peripheral device (channels 0–6) and for each external interrupt source (IRQA, IRQB), can be enabled or
disabled under software control. The IPR also specifies the trigger mode of the external interrupt sources.
Figure 7-3 shows how it might be programmed for different interrupts.
IBL0
Enabled?
IAL0
0
1
Figure 7-3. Example On-Chip Peripheral and IRQ Interrupt Programming
7.3.5

Interrupt Sources

An interrupt request is a request to break out of currently executing code to enter an interrupt service
routine. Interrupt requests in the DSP are generated from one of three sources: external hardware, internal
hardware, and internal software. The internal hardware interrupt sources include all of the on-chip
peripheral devices.
Each interrupt source has at least one associated interrupt vector, and some sources may have several
interrupt vectors. The interrupt vector addresses for each interrupt source are listed in the interrupt vector
table (Table 7-4). These addresses are usually located in either the first 64 or 128 locations of program
memory. For further information on a device's on-chip peripheral interrupt sources, see the device's
individual user's manual.
* * *
Figure 7-2. Example Interrupt Priority Register
Chx Enabled?
0
1
IPL
No —
Yes 0
Interrupts and the Processing States
IBL IBL IAL IAL
*
1 0 1 0
IPL
No —
Yes 0
IBL1
IAL1
0
1
Exception Processing State
*
IRQA Mode
IRQB Mode
(Reserved)
Channel 6 IPL
Channel 5 IPL
Channel 4 IPL
Channel 3 IPL
Channel 2 IPL
Channel 1 IPL
Channel 0 IPL
AA0057
Trigger Mode
Level sensitive
Edge sensitive
AA0058
7-9