Deu Control Register (Dcr); Deu Configuration Register (Dcfg) - Motorola DigitalDNA MPC180E User Manual

Operational Registers

4.1.1 DEU Control Register (DCR)

The control register, shown in Figure 4-1, contains static bits that define the encryption
mode of operation for the DEU. This is typically written along with the keys and
initialization vector at the start of each new encryption process. All unused bits of DCR
are read as 0 values.
0
Field
Reset
R/W
Addr
Table 4-2 describes control register fields.
Bits Name
0–28 — Reserved, should be cleared.
29 MODE Selects the DES mode of operation. Both Electronic Code Book (ECB) and Cipher Block
Chaining (CBC) are supported.
0 = ECB
1 = CBC
30 XDES Controls single DES or triple DES.
0 = Single DES
1 = Triple DES
31 E/D Controls whether the input data will be encrypted or decrypted.
0 = decrypt
1 = encrypt
4.1.2 DEU Configuration Register (DCFG)
The configuration register contains two bits that are set only during hardware initialization.
All unused bits of DCFG are read as 0 values.
0
Field
Reset
R/W
Addr
Figure 4-2. DEU Configuration Register (DCFG)
4-2
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
—
0000_0000_0000_0000
R
0x200
Figure 4-1. DES Control Register (DCR)
Table 4-2. DCR Field Descriptions
—
0000_0000_0000_0000
R
0x20E
MPC180E Security Processor User's Manual
28
MODE XDES
Description
29 30 31
E/D
R/W
29 30 31
RST IMSK
W
R/W