Renesas H8SX/1520 Series Hardware Manual page 433

Bit Bit Name
3 PER
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Initial
Value R/W Description
0 R/(W)* Parity Error
Indicates that a parity error has occurred during reception
in asynchronous mode and the reception ends
abnormally.
[Setting condition]
•
[Clearing condition]
•
Section 12 Serial Communication Interface (SCI)
When a parity error is detected during reception
Receive data when the parity error occurs is
transferred to RDR, however, the RDRF flag is not
set. Note that when the PER flag is being set to 1, the
subsequent serial reception cannot be performed. In
clocked synchronous mode, serial transmission also
cannot continue.
When 0 is written to PER after reading PER = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
Even when the RE bit in SCR is cleared, the PER flag
is not affected and retains its previous value.
Rev. 3.00 Mar. 14, 2006 Page 395 of 804
REJ09B0104-0300