Renesas H8SX/1520 Series Hardware Manual page 278

Section 8 I/O Ports
Output
Specification
Port Signal Name
P3 0 TIOCA0_OE*
PO8_OE*
P6 4 HTxD_OE
2 SCK4_OE
0 TxD4_OE
PA 7 Bφ_OE
3 SSO2_OE
2 SSI2_OE
1 SSCK2_OE
SCS1_OE
PD 7
6 SSCK1_OE
5 SSI1_OE
Rev. 3.00 Mar. 14, 2006 Page 240 of 804
REJ09B0104-0300
Downloaded from Elcodis.com electronic components distributor
Signal
Output Selection
Signal Register
Name Settings Peripheral Module Settings
TIOCA0 TPU.TIORH_0.IOA3 = 0, TPU.TIORH_0.IOA[1,0] =
01/10/11
PO8 NDERH.NDER8 = 1
HTxD HCAN MBCR.MBCRn = 0, HCAN.TXRP.TXRn = 1
while HCAN.HCANMON.HCANE = 1,
HCAN.HCANMON.TxSTP = 0
(n = 1 to 15)
SCK4 When SCMR_4.SMIF = 1:
SCR_4.TE = 1 or SCR_4.RE = 1
while SMR_4.GM = 0, SCR_4.CKE [1, 0] = 01 or
while SMR_4.GM = 1
When SCMR_4.SMIF = 0:
SCR_4.TE = 1 or SCR_4.RE = 1
while SMR_4.C/A = 0, SCR_4.CKE [1, 0] = 01 or
while SMR_4.C/A = 1, SCR_4.CKE 1 = 0
TxD4 SCR.TE = 1
Bφ PADDR.PA7DDR = 1, SCKCR.PSTOP1 = 0,
SCKCR.POSEL1 = 0
SSI02
When SSU.SSCRL_2.SSUMS = 0, SSU.SSCRH_2.MSS = 1:
SSU.SSCRH_2.BIDE = 0, SSU.SSER_2.TE = 1 or
SSU.SSCRH_2.BIDE = 1, SSU.SSER_2.RE = 0, SSU.SSER_2.TE
= 1
When SSU.SSCRL_2.SSUMS = 0, SSU.SSCRH_2.MSS = 0:
SSU.SSCRH_2.BIDE = 1, SSU.SSER_2.RE = 0, SSU.SSER_1.TE
= 1
When SSU.SSCRL_2.SSUMS = 1:
SSU.SSER_2.TE = 1
SSI2 SSU.SSCRL_2SSUMS = 0, SSU.SSCRH_2.MSS = 0
SSU.SSCRH_2.BIDE = 0, SSU.SSER_2.TE = 1
SSCK2 SSU.SSCRH_2.MSS = 1, SSU.SSCRH_2.SCKS = 1
SCS1
SSU.SSCRH_0.CSS1 = 1, SSU.SSCRH_0.CSS0 = 0 or
SSU.SSCRH_0.CSS1 = 1, SSU.SSCRH_0.CSS0 = 1
while SSU.SSCRL_0.SSUMS = 0, SSU.SSCRH_0.MSS = 1
SSCK1 SSU.SSCRH_1.MSS = 1, SSU.SSCRH_1.SCKS = 1
SSI1 SSU.SSCRL_1.SSUMS = 0, SSU.SSCRH_1.MSS = 0
SSU.SSCRH_1.BIDE = 0, SSU.SSER_1.TE = 1