Control Signal Timing; Figure 21.6 Reset Input Timing; Table 21.5 Control Signal Timing - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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21.3.2

Control Signal Timing

Table 21.5 Control Signal Timing

Conditions: V
Item
RES setup time
RES pulse width
NMI setup time
NMI hold time
NMI pulse width (after leaving
software standby mode)
IRQ setup time
IRQ hold time
IRQ pulse width (after leaving
software standby mode)
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= 4.5 V to 5.5 V, AV
CC
V
= AV
= 0 V, Iφ = 8 to 40 MHz,
SS
SS
T
= –40°C to +85°C (wide-range specifications)
a
RES

Figure 21.6 Reset Input Timing

= 4.5 V to 5.5 V, AV
CC0
Symbol
Min.
t
200
RESS
t
20
RESW
t
150
NMIS
t
10
NMIH
t
200
NMIW
t
150
IRQS
t
10
IRQH
t
200
IRQW
t
RESS
t
RESW
Section 21 Electrical Characteristics
= 4.5 V to 5.5 V,
CC1
Max.
Unit
Test Conditions
ns
Figure 21.6
t
cyc
ns
Figure 21.7
ns
ns
ns
ns
ns
t
RESS
Rev. 3.00 Mar. 14, 2006 Page 767 of 804
REJ09B0104-0300

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