Figure 12.13 Sample Multiprocessor Serial Reception Flowchart (1) - Renesas H8SX/1520 Series Hardware Manual

Section 12 Serial Communication Interface (SCI)
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No
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Figure 12.13 Sample Multiprocessor Serial Reception Flowchart (1)

Rev. 3.00 Mar. 14, 2006 Page 420 of 804
REJ09B0104-0300
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Initialization
Start reception
Set MPIE bit in SCR to 1
Read ORER and FER flags in SSR
FER ∨ ORER = 1
No
Read RDRF flag in SSR
RDRF = 1
Yes
Read receive data in RDR
This station's ID?
Yes
Read ORER and FER flags in SSR
FER ∨ ORER = 1
No
Read RDRF flag in SSR
RDRF = 1
Yes
Read receive data in RDR
All data received?
Yes
Clear RE bit in SCR to 0
<End>
[1] SCI initialization:
[1]
The RxD pin is automatically designated
as the receive data input pin.
[2] ID reception cycle:
Set the MPIE bit in SCR to 1.
[2]
[3] SCI state check, ID reception and
comparison:
Read SSR and check that the RDRF
flag is set to 1, then read the receive
Yes
data in RDR and compare it with this
station's ID. If the data is not this
station's ID, set the MPIE bit to 1 again,
and clear the RDRF flag to 0. If the data
[3]
is this station's ID, clear the RDRF flag
to 0.
[4] SCI state check and data reception:
Read SSR and check that the RDRF
flag is set to 1, then read the data in
RDR.
[5] Receive error processing and break
detection:
If a receive error occurs, read the ORER
and FER flags in SSR to identify the
error. After performing the appropriate
error processing, ensure that the ORER
and FER flags are both cleared to 0.
Reception cannot be resumed if either
of these flags is set to 1. In the case of a
Yes
framing error, a break can be detected
by reading the RxD pin value.
[4]
No
[5]
Error processing
(Continued on
next page)