Figure 17.1 Block Diagram Of Flash Memory - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer

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Section 17 Flash Memory (0.18-(m F-ZTAT Version)

• Programming/erasing protection

Protection against programming/erasing of the flash memory can be set by hardware

protection, software protection, or error protection.

• Flash memory emulation function using the on-chip RAM

Realtime emulation of the flash memory programming can be performed by overlaying parts

of the flash memory (user MAT) area and the on-chip RAM.

Rev. 3.00 Mar. 14, 2006 Page 570 of 804

REJ09B0104-0300

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Internal address bus

Internal data bus (32 bits)

FCCS: Flash code control/status register

FPCS: Flash program code select register

FECS: Flash erase code select register

FKEY: Flash key code register

FMATS: Flash MAT select register

FTDAR: Flash transfer destination address register

RAMER: RAM emulation register

Note: To read from or write to the registers, the FLSHE bit in SYSCR must be set to 1.

Figure 17.1 Block Diagram of Flash Memory

Memory MAT unit

Control unit

User MAT: 256 kbytes

User boot MAT: 10 kbytes

Flash memory

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