Renesas H8SX/1520 Series Hardware Manual page 49

Classifi-
cation Abbreviation
Interrupts NMI
IRQ14
IRQ13
IRQ12
IRQ11-A/IRQ11-B
IRQ10-A/IRQ10-B
IRQ9-A/IRQ9-B
IRQ8-A/IRQ8-B
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
IRQ2
IRQ1
IRQ0
TRST
Debugging
interface
TMS
TDO
TDI
TCK
16-bit TCLKA
timer
TCLKB
pulse unit
TCLKC
(TPU)
(unit 0)*
TCLKD
TIOCA0
TIOCB0
TIOCC0
TIOCD0
TIOCA1
TIOCB1
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Pin Number
H8SX/1527 H8SX/1525
67 67
11 11
10 10
9 9
51/8 51/8
50/7 50/7
49/6 49/6
48/5 48/5
47 47
46 46
45 45
44 44
43 43
42 42
40 40
38 38
62 62
63 63
8 8
64 64
65 65

60

61

63

65

58, 59

59

60, 61

61

62, 63

63
I/O Description
Input Non-maskable interrupt request signal.
When this pin is not in use, this signal
must be fixed high.
Input Maskable interrupt request signal.
Input Interface pins for debugging by the on-chip
emulator.
Input
Output
Input
Input
Input Input pins for the external clocks.
I/O Signals for TGRA_0 to TGRD_0. These
are used for the input capture
inputs/output compare outputs/PWM
outputs.
I/O Signals for TGRA_1 and TGRB_1. These
are used for the input capture
inputs/output compare outputs/PWM
outputs.
Rev. 3.00 Mar. 14, 2006 Page 11 of 804
Section 1 Overview
REJ09B0104-0300