Renesas H8SX/1520 Series Hardware Manual page 504

Section 13 Controller Area Network (HCAN)
Bit Bit Name
14 IRR6
13 IRR5
12 IRR4
Rev. 3.00 Mar. 14, 2006 Page 466 of 804
REJ09B0104-0300
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Initial
Value R/W
0 R/(W)*
0 R/(W)*
0 R/(W)*
Description
Bus Off Interrupt Flag
Status flag indicating the bus off state caused by
the transmit error counter.
[Setting condition]
When TEC ≥ 256
[Clearing condition]
Writing 1
(When the CPU is used to clear this flag by
writing 1 while the corresponding interrupt is
enabled, be sure to read the flag after writing 1 to
it.)
Error Passive Interrupt Flag
Status flag indicating the error passive state
caused by the transmit/receive error counter.
[Setting condition]
When TEC ≥ 128 or REC ≥ 128
[Clearing condition]
Writing 1
(When the CPU is used to clear this flag by
writing 1 while the corresponding interrupt is
enabled, be sure to read the flag after writing 1 to
it.)
Receive Overload Warning Interrupt Flag
Status flag indicating the error warning state
caused by the receive error counter.
[Setting condition]
When REC ≥ 96
[Clearing condition]
•
Writing 1
(When the CPU is used to clear this flag by
writing 1 while the corresponding interrupt is
enabled, be sure to read the flag after writing 1 to
it.)