Figure 17.16 Transitions To Error Protection State - Renesas H8SX/1520 Series Hardware Manual

Error protection is canceled by a reset. Note that the reset should be released after the reset input
period of at least 100 µs has passed. Since high voltages are applied during programming/erasing
of the flash memory, some voltage may remain after the error protection state has been entered.
For this reason, it is necessary to reduce the risk of damaging the flash memory by extending the
reset input period so that the charge is released.
The state-transition diagram in figure 17.16 shows transitions to and from the error protection
state.
Programming/erasing
Read disabled
Programming/erasing enabled
Error occurrence
Error-protection mode
Programming/erasing disabled
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mode
FLER = 0
Software standby mode
Read enabled
software standby mode
FLER = 1

Figure 17.16 Transitions to Error Protection State

Section 17 Flash Memory (0.18-(m F-ZTAT Version)
RES = 0
RES = 0
Error-protection mode
(software standby)
Cancel
Programming/erasing disabled
Programming/erasing interface
register is in its initial state.
Rev. 3.00 Mar. 14, 2006 Page 625 of 804
Reset
(hardware protection)
Read disabled
Programming/erasing disabled
FLER = 0
Programming/erasing interface
register is in its initial state.
Read disabled
FLER = 1
REJ09B0104-0300