Renesas H8SX/1520 Series Hardware Manual page 826

Item
Figure 14.9 Flowchart Example of
Simultaneous
Transmission/Reception (SSU
Mode)
14.4.7 Clock Synchronous
Communication Mode
Figure 14.12 Example of Initial
Settings in Clock Synchronous
Communication Mode
Figure 14.14 Flowchart Example
of Transmission Operation
Rev. 3.00 Mar. 14, 2006 Page 788 of 804
REJ09B0104-0300
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Page Revision (See Manual for Details)
537 Amended
[1]
Transmission/reception started
[2]
Clear TE and RE in SSER to 0
539 Amended
[4]
[5]
541 Deleted
[1]
[2]
Start
Initial setting
(TE = 1, RE = 1)
Read TDRE in SSSR
Consecutive data
transmission/reception?
No
Read TEND in SSSR
No
TEND = 1?
Yes
Clear TEND in SSSR to 0
No
Has the 1 bit transfer
period elapsed?
Yes
End transmission/reception
Start setting initial values
Specify CPOS, CKS2, CKS1, and
CKS0 bits in SSMR
Specify SDOS, SSCKOS, SCSOS,
TENDSTS, SCSATS, and
SSODTS bits in SSCR2
Specify TE, RE, TEIE, TIE, RIE, and
CEIE bits in SSER simultaneously
End
Start
Initial setting
TE = 1 (transmission enabled)
Read TDRE in SSSR
Error processing