Renesas H8SX/1520 Series Hardware Manual page 366

Section 9 16-Bit Timer Pulse Unit (TPU)
Channel Name
10 TGI10A
TGI10B
TCI10V
TCI10U
11 TGI11A
TGI11B
TCI11V
TCI11U
Note: 1. This table shows the initial state immediately after a reset. The relative channel priority
levels can be changed by the interrupt controller.
2. The H8SX/1527 does not have the input capture function for channels 4 and 5.
(1)
Input Capture/Compare Match Interrupt
An interrupt is requested if the TGIE bit in TIER is set to 1 when the TGF flag in TSR is set to 1
by the occurrence of a TGR input capture/compare match on a channel. The interrupt request is
cleared by clearing the TGF flag to 0. The TPU has 16 input capture/compare match interrupts,
four each for channels 0 and 3, and two each for channels 1, 2, 4, and 5.
(2)
Overflow Interrupt
An interrupt is requested if the TCIEV bit in TIER is set to 1 when the TCFV flag in TSR is set to
1 by the occurrence of a TCNT overflow on a channel. The interrupt request is cleared by clearing
the TCFV flag to 0. The TPU has six overflow interrupts, one for each channel.
(3)
Underflow Interrupt
An interrupt is requested if the TCIEU bit in TIER is set to 1 when the TCFU flag in TSR is set to
1 by the occurrence of a TCNT underflow on a channel. The interrupt request is cleared by
clearing the TCFU flag to 0. The TPU has four underflow interrupts, one each for channels 1, 2, 4,
and 5.
Rev. 3.00 Mar. 14, 2006 Page 328 of 804
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Interrupt Source
TGRA_4 input capture/compare match
TGRB_4 input capture/compare match
TCNT_4 overflow
TCNT_4 underflow
TGRA_5 input capture/compare match
TGRB_5 input capture/compare match
TCNT_5 overflow
TCNT_5 underflow
DMAC
Interrupt Flag Activation
TGFA_4 Possible
TGFB_4 Not possible
TCFV_4 Not possible
TCFU_4 Not possible
TGFA_5 Possible
TGFB_5 Not possible
TCFV_5 Not possible
TCFU_5 Not possible