Renesas H8SX/1520 Series Hardware Manual page 187

Bit Bit Name
7 DTF1
6 DTF0
5 DTA

4, 3
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Initial
Value R/W Description
0 R/W Data Transfer Factor 1 and 0
0 R/W Select a DMAC activation source. When the on-chip
peripheral module setting is selected, the interrupt
source should be selected by DMRSR. When the
external request setting is selected, the sampling
method should be selected by the DREQS bit.
00: Auto request (cycle stealing)
01: Auto request (burst access)
10: On-chip module interrupt
11: External request
0 R/W Data Transfer Acknowledge
This bit is valid while the DMA transfer is performed by
the on-chip module interrupt. This bit decides whether
the source flag selected by DMRSR is cleared or not.
0: The source flag is not cleared while the DMA transfer
1: The source flag is cleared while the DMA transfer is
All 0 R Reserved
These are read-only bits and cannot be modified.
is performed by the on-chip module interrupt. Since
the source flag is not cleared by the DMA transfer, it
should be cleared by the CPU.
performed by the on-chip module interrupt. Since the
source flag is cleared by the DMA transfer, there is
no need to request an interrupt to the CPU.
Rev. 3.00 Mar. 14, 2006 Page 149 of 804
Section 7 DMA Controller (DMAC)
REJ09B0104-0300