Renesas H8SX/1520 Series Hardware Manual page 333

32-bit cisc microcomputer
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Bit
Bit Name
0
TGFA
Note:
Only 0 can be written to clear the flag.
*
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Initial
value
R/W
Description
0
R/(W)* Input Capture/Output Compare Flag A
Status flag that indicates the occurrence of TGRA input
capture or compare match.
[Setting conditions]
[Clearing conditions]
Section 9 16-Bit Timer Pulse Unit (TPU)
When TCNT = TGRA while TGRA is functioning as
output compare register
When TCNT value is transferred to TGRA by input
capture signal while TGRA is functioning as input
capture register
When DMAC is activated by a TGIA interrupt while
the DTA bit in DMDR of DMAC is 1
When 0 is written to TGFA after reading TGFA = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
Rev. 3.00 Mar. 14, 2006 Page 295 of 804
REJ09B0104-0300

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