Renesas H8SX/1520 Series Hardware Manual page 643

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Programming Procedure in User Program Mode
The procedures for download of the on-chip program, initialization, and programming are shown
in figure 17.11.
Start programming
procedure program
Select on-chip program
to be downloaded and
specify download
destination by FTDAR
Set FKEY to H'A5
Set SCO to 1 after initializing
VBR and execute download
Clear FKEY to 0
DPFR = 0?
Set the FPEFEQ
JSR FTDAR setting + 32
The procedure program must be executed in an area other than the flash memory to be
programmed. Setting the SCO bit in FCCS to 1 to request download must be executed in the on-
chip RAM. The area that can be executed in the steps of the procedure program (on-chip RAM
and user MAT) is shown in section 17.8.4, On-Chip Program and Storable Area for Program Data.
The following description assumes that the area to be programmed on the user MAT is erased and
that program data is prepared in the consecutive area.
Downloaded from Elcodis.com electronic components distributor
1.
2.
3.
4.
5.
No
Yes
Download error processing
6.
parameter
Initialization
7.
8.
FPFR = 0?
No
Yes
Initialization error processing
1
Figure 17.11 Programming Procedure in User Program Mode
Section 17 Flash Memory (0.18-(m F-ZTAT Version)
1
Disable interrupts and bus
master operation
other than CPU
Set FKEY to H'5A
Set parameters to ER1
and ER0
(FMPAR and FMPDR)
Programming
JSR FTDAR setting + 16
FPFR = 0?
Yes
Required data
No
programming is
completed?
Yes
Clear FKEY to 0
End programming
procedure program
Rev. 3.00 Mar. 14, 2006 Page 605 of 804
9.
10.
11.
12.
13.
No
Clear FKEY and
programming
error processing
14.
15.
REJ09B0104-0300