Renesas H8SX/1520 Series Hardware Manual page 618

32-bit cisc microcomputer
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Section 17 Flash Memory (0.18-(m F-ZTAT Version)
Bit
Bit Name
7
6
5
4
FLER
3 to 1
Rev. 3.00 Mar. 14, 2006 Page 580 of 804
REJ09B0104-0300
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Initial
Value
R/W
Description
1
R
Reserved
0
R
These are read-only bits and cannot be modified.
0
R
0
R
Flash Memory Error
Indicates that an error has occurred during programming
or erasing the flash memory. When this bit is set to 1,
the flash memory enters the error protection state.
When this bit is set to 1, high voltage is applied to the
internal flash memory. To reduce the damage to the
flash memory, the reset must be released after the reset
input period (period of RES = 0) of at least 100 µs.
0: Flash memory operates normally (Error protection is
[Clearing condition]
1: An error occurs during programming/erasing flash
[Setting conditions]
All 0
R
Reserved
These are read-only bits and cannot be modified.
invalid)
At a power-on reset
memory (Error protection is valid)
When an interrupt, such as NMI, occurs during
programming/erasing.
When the flash memory is read during
programming/erasing (including a vector read and
an instruction fetch).
When the SLEEP instruction is executed during
programming/erasing (including software standby
mode).
When a bus master other than the CPU, such as the
DMAC, obtains bus mastership during
programming/erasing.

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